US3852950A - Electronic timepiece - Google Patents

Electronic timepiece Download PDF

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US3852950A
US3852950A US00311945A US31194572A US3852950A US 3852950 A US3852950 A US 3852950A US 00311945 A US00311945 A US 00311945A US 31194572 A US31194572 A US 31194572A US 3852950 A US3852950 A US 3852950A
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time
shift register
display
electronic timepiece
date
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US00311945A
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K Yoda
K Tanaka
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Seiko Instruments Inc
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Seiko Instruments Inc
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    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G5/00Setting, i.e. correcting or changing, the time-indication
    • G04G5/04Setting, i.e. correcting or changing, the time-indication by setting each of the displayed values, e.g. date, hour, independently
    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G9/00Visual time or date indication means
    • G04G9/08Visual time or date indication means by building-up characters using a combination of indicating elements, e.g. by using multiplexing techniques
    • G04G9/087Visual time or date indication means by building-up characters using a combination of indicating elements, e.g. by using multiplexing techniques provided with means for displaying at will a time indication or a date or a part thereof

Abstract

An electronic timepiece comprises means for selectively displaying the time including at least one of date, day of the week, hour, minute and second, and means for rapidly adjusting or correcting said displayed time, thus making possible the rapid time correction or adjustment with simple construction, and with minimum operation switches.

Description

United States Patent 11 1 Yoda et al. Dec. 10, 1974 ELECTRONIC TIMEPIECE 3,646,751 3/1972 Purland 58/50 R 3,653,204 4/1972 M'wa 58/4 A [75] Inventors: Kazuhlro Yoda, Tokyo; KOJllO 3,672,155 6/1972 selrgy et ai 5850 R Tanaka, Yachlyo, both of Japan 3,707,071 12/1972 Walton 58/50 R [73] Assignee: Kabushiki Kaisha Daini Seikosha,
Tokyo Japan Primary Examiner-Edith Simmons .lackmon [22] Filed: Dec. 4, 1972 Attorney, Agent, or Firm-Robert E. Burns; [211 pp NOI: 311,945 Emmanuel J. Lobato; Bruce L. Adams [30] Foreign Application Priority Data 57] ABSTRACT Dec. 7, 1971 Japan t. 46-98296 An electronic timepiece comprises means for selec- [52] US. Cl 58/4 A, 58/58, 58/85.5 i l displaying the time including at |east one of [51] Int. Cl. G04b 19/24, G041) 27/00 date, day f the week, hour minute and Second, and [58] 0f Search 40/107; 58/4 4 5, means for rapidly adjusting or correcting said dis- 58/6 R, 23 50 played time, thus making possible the rapid time correction 0r adjustment with simple construction, and [56] References (Med with minimum operation switches.
UNITED STATES PATENTS 3,333,410 8/1967 Barbella 7. 58/4 R 6 Claims, 3 Drawing Figures I Li NANDI NORl "1M2; E I N2 lstnic present [CLOCK .WO 0 o L 1. J
3| G4 i I m ORI 0R2 DEI I I 5 DATE DAY OF THE WEEK l ELECTRONIC TIMEIPIECE BACKGROUND OF THE INVENTION This invention relates generally to electronic timepieces and more particularly to an easy-to-handle electronic timepiece of a small size wherein time adjustments are made with ease.
When adjusting the time of an electronic wrist watch, the adjustment has so far been made in the following way. In case the date is being adjusted the date setting switch is turned on. Likewise, the week-setting switch is turned on when one wants to adjust the week. Similarly the minute-setting switch is turned on when one wants to adjust the minutes. The second-setting switch is adjusted in a similar manner when one wants to adjust the seconds. As a consequence conventional electronic timepieces require as many as five different switches, in terms of the setting switches alone.
SUMMARY OF THE INVENTION An object of the present invention is to provide an electronic timepiece correctly adjustable by extremely simple operations whenever one wants to adjust advances or delays of the timepiece.-
An electronic timepiece according to the present invention comprises means for generating a time signal of a unit time serving as a time base. Means are provided for displaying time indications including at least one of the date, day of the week, hour, minute and seconds time indications in digital formby counting the time signal with counting means. Control means control the display means to selectively display one of the times of date, day of the week, hour, minute and second. The control means comprises a shift register having at least one output signal of a predetermined level upon reception of which said display means are operated to display at least one of said time indications and switching means for shifting said output signal ofa predetermined level to change the display of time. Thus the functions of the conventional setting switches are performed by a single setting switch in this invention. Which indication of the date, day of the week, minute or second should be set is indicated. This is realized by providing the watch with a shift switch. Furthermore, in adjusting the minutes or seconds, high-accuracy adjustment can be accomplished almost instantly by use of a resetting switch. The invention can be achieved more perfectly, by providing a safety switch which prevents erroneous operation.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a block diagram of an embodiment of an electronic timepiece according to the present invention; and
FIGS. 2 and 3 are, respectively, block diagram and logic tables of gate circuits employed in an electronic timepiece according to the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT In FIG. 1, there is shown an embodiment of an electronic timepiece according to the present invention wherein a seconds pulse generator 11 comprising a quartz oscillator OSC and a frequency divider DIV produces a seconds pulse. The divider divides the frequency of the crystal so the output is a frequency of one pulse per second which is applied through a NOR circuit 6, to a seconds counter GOS, a minute counter GOM, an hour counter 24, and a day of the week counter 7 connected cascaded through gate circuits G, to G respectively. The output of the week counter 7 is applied to a date counter 31 through a gate circuit 6,. The seconds, minute, hour, day of the week, and date time signals respectively produced by the second counter GOS, minute counter GOM, hour counter 24, day of the week counter 7 and date counter 31 are transmitted to a second decoder DB minute decoder DE,, hour decoder DE, day of the week decoder DE,, and date decoder DE, of a decoder 13 for DATE, Day of The WEEK, HOUR, MINUTE, and SECOND displays on a display panel 14 under control of OR circuits OR, to OR.,, respectively. The gate circuits G to G, comprise NOR circuits 21 to 24 and an inverter IN including four input terminals A to D and an output terminal E as. shown in FIG. 2. The signals appearing at the output terminal E are determined according to a logic truth table wherein X" means that either signal 1 to 0" applies and C and D mean that the output signals on the terminal E coincide with the input signals on the terminals C and D, respectively.
On the other hand, the gate circuit G, comprises NOR circuits 21 to 23, and an inverter IN including three input terminals A, C, and D, and the output terminal E as shown in FIG. 3. The signals appearing at the output terminal E are determined by the logic truth table as shown in FIG. 3.
The OR gate circuits OR, to OR, receive the signals from a shift register 12, having six bits in this embodiment, which shifts the signal I initially stored on the first bit to the next adjacent bits in succession for every reception of the clock pulse from a NOR circuit NOR,
In order to control the time display there is provided a switching section 15 comprising a set switch'S,, a shift switch 8,, a reset switch S and a safety switch 8,. The switches S, to S can only be operated when they are pressed jointly with the safety switch S, for preventing erroneous operations. The simultaneous operation of the set switch S, and the safety switch 5., causes the NOR circuit NOR, to be operated through a NOR circuit NOR, and an inverter W, for rapid correction of the minute, hour, day of the week and date displays. The operation of the shift switch S together with the safety switch 8., applies a clock pulse to the shift register 12 for selective display of the seconds to the date. On the other hand, when the reset switch S is pressed together with the safety switch S.,, the shift register 12 is reset through a NOR circuit NOR, and NAND gate circuits NAND, and NAND The shift register 12 initially has stored therein a control signal, 100000, as shown in FIG. 1, corresponding to the normal mode of operation of the electronic timepiece, or when there is no need to change the display of the date, day of the week, hour, minute and second. In this case the signal stored in the first-digit of the shift register 12 is applied to the control terminals of the decoders DE,, DB DE,,, DE, and DE,, via OR gate OR,, OR gate OR,, OR gate OR, and OR gate 0R respectively. The outputs of the decoders DE,, DE,, DE,,, DE, and DE,, are applied to the corresponding date display DATE, day of the week display Day Of The WEEK, hour display HOUR, minute display MINUTE and seconds display SEC.
The seconds pulse is generated from the frequency divider which divides the high oscillatory frequency of the quartz oscillator into the low frequency. The seconds pulse from the divider is applied to the input of a 60-abic second counter GOS via the NOR gate NOR 6 so as to apply the seconds signals to the input of the decoder DE, for seconds display. Furthermore, the carry pulse from the 60-abic second counter GOS is applied from the input terminal C of the GATE circuit G,, via I the output terminal E, to the 60-abic minute counter GOS for generating the minute signals so as to apply the minute signals from the 60-abic minute counter to the input of the decoder DE, for display of minutes.
The carry pulse from the 60-abic minute counter GOM for generating the minute signals is applied to the 24-abic hour counter 24 from the input terminal of the GATE circuit G via the output terminal E. The 24- abic hour counter 24 in turn applies the hour signals to the decoder DE, for hour displays. Similarly, the output of the 24-abic hour counter 24 is connected to the input terminal C in the GATE circuit 6;, to connect 24- abic hour counter 24 to the 7-abic week counter 7 for generating the day of the week signals.
The 7-abic day of the week counter 7 applies week signals to the decoder DE, for day of the week displays. The carry pulse from the 24-abic hour counter 24 for generating the hour signals is applied from the input terminal C of the gate circuit G, to the 3l-abic date counter 31 for generating the date signal 8 via the output terminal E thereof, while date signals from the 31- abic date counter 31 are applied to the decoder DE, for date display. Since the input of the terminal A of the gate circuit G, is zero due to no outputs of the fifth and sixth digit of the shift register, the output of the terminal E is the same as that of the terminal C under normal operating conditions. Moreover, the gate input B is zero since the fourth digit output of the shift register 12, is zero. Consequently, the output of the terminal E of gate circuit G is equal to the input of the terminal C, if input of the terminal A is zero (See the Logic Tables in FIG. 2 and FIG. 3).
During normal operating conditions, namely when the control signal stored in the shift register 12 is 100000, display section 14 displays signals from the counters 31, 7, 24, 60M and 60S.
When only the date display is to be changed, the shift switch S is operated simultaneously with the safety switch 8,. The operation of the shift switch S and safety switch S, causes the signal conditions to be changed from I to to change the output of the NOR gate NOR 3 to 1 thus applying a shifting clock pulse to the shift register 12. The signal 0 is always applied to the first digit input of the shift register 12, so that the application of the clock pulse changes the state of the register 12 into 010000.
Consequently, the outputs of the decoders DE DB DE, and DE, arae changed to 0 due to the change in outputs of OR gates OR,, OR, and OR, caused by the change from 1" to 0" in the output of the first digit of the shift register 12. As a result, day of the week,
hour, minute and second indications disappear on the display panel 14. (In other words, the light in the display panel is extinguishedwhen light emission elements, for example light emission diodes, are employed. This state is hereinafter referred to as extinguished.)
On the other hand, the output of the second digit in the shift register 12 is changed from 0 to I with the result that the date signals from the date counter 31 are applied to the decoder DE, through the OR gate OR, to operate the DATE display.
When the content of the DATE display is to be changed, the shift switch 5;, together with the safety switch S, are turned on to operate only the date display. It is to be noted that other day of the week, hour, minute and second displays are not operated, they are extinguished.
Under such conditions, the setting switch S, together with the safety switch S, are actuated to apply the input 0 to the NOR gate NOR 7 through the NOR 2 and the inverter W, for correction of the date display. Accordingly, the seconds pulse from the seconds pulse generator 11 is applied to the input terminals D of the Gate circuits G, to G.,, respectively, during operation of the shift switch S Only the gate circuit G connecting the 7-abic week counter 7 to the 31-abic date counter 31 has the signal on its input terminal'A changed from 0 to I," so that the signal on the output terminal E conforms to that on the input terminal D (see the logic table in FIG. 2) to which the seconds pulses are applied from the seconds pulse generator 11. Thus the date display undergoes rapid adjustment because the signal on the terminal E is applied to the date counter 31.
When the day of the week display is to be changed, the shift switch S together with safety switch S, are turned on once again. Thus the clock pulse is applied to the shift register 12 from the NOR gate NOR- and the content of the shift register 12 changes to 001000. At this time, the output of the second digit of the shift register changes from l to 0. As a result, the output of the date display decoder DE, is blocked and the date display is operated. At the same time, the day of the week display Day Of The WEEK is operated because the output of the third digit of the shift register 12 changes from 0 to I (note that the hour display, minute display and second display remain extinguished).
Next, if the safety switch S, and set switch S, are turned on simultaneously, an 0 signal level is applied to the NOR gate NOR, and the gate of NOR gate NOR, is opened, and the seconds pulse signal coming from the seconds pulse generator 11 is applied to the terminals D of the GATE circuits G, to G At this time, the seconds pulse appears only at the output terminal E is the GATE circuit G which connects the 24-abic hour counter 24 to the 7-abic day of the week counter 7 counting circuit for day display (see the logical table in FIG. 2). It is by the function of this seconds pulse that quick change of the day of the week takes place.
When the hour display is to be corrected, the procedures are as follows: When the shift switch S and safety switch S, are turned on together, the hour display HOUR only is operated, just as in the case where the weekdisplay is changed. If the set switch S, and safety switch S, are turned on simultaneously in the next step, NOR gate NOR, opens and the second pulse is applied to the terminals D in the GATE circuits G, to G At this time, the signal 1" on the fourth digit output of the shift register is applied to the terminal A of the GATe circuit G which connects the 60-abic minute counter GOM to the 24-abic hour counter 24. Thus the seconds pulse is applied from the seconds pulse generator 11 via GATE circuitG to the hour counter 24 to change the hour display by controlling the set switch 5,.
The minute display is rapidly set in the following way:
If the shift switch S and safety switch S are turned on simultaneously in the similar manner, the NOR gate NOR opens and clocks the shift register 12. More specifically, its content turns into 000010 and the fifth digit output of the shift register serves to control the decoders DE, and DE, via OR gate 0R thereby causing the decoder DE, and DE, to display minute and seconds signals and at the same time keeping date, day of the week and hour displays extinguished. If the set switch 5, and safety switch S, are turned on at this instant, the seconds pulse will be applied from the seconds pulse generator 11 via terminal E in the GATE circuit G, which connects the 60-abic minute counter GOM to the 60-abic seconds counter GOS, to change the minute display to the required minute.
If the shift switch S and safety switch S, are now i turned on, the content of the shift register temporarily turns into 000001 by function of the shift pulse, but the sixth digit output immediately resets respectively the second, third, fourth, fifth, and sixth digit of the shift register 12 via the inverter IN and NAND gate NAND so as to produce the signal l in the 1st digit of shift register 12. In other words, the content of the shift register is restored to the initial state. As seen above in the embodiment in FIG. 1, the date display DATE, day of the week display, DAY OF THE WEEK, hour display HOUR, minute display MINUTE and seconds display SECOND can be selected simply by turning on the shift switch 8,. Likewise, the content of the display thus selected can be changed to the required display by turning on the set switch S, and safety switch 8,.
Next the operation of the reset switch S is described. If the reset switch S is turned on simultaneously with the safety switch the output signal of NOR gate NOR, changes from 0 to l and this output is applied to one input of the NAND gate NAND,. At the I same time, the output of the NOR gate NOR, is delayed by only a short time by inverter IN, and applied to another input of NAND gate NAND,, so that a the signal level of0 at the output of the NAND circuit NAND, is applied to the NAND circuit NAND in form of a pulse. Thus the pulse l having a narrow width is produced from the output of the NAND circuit NAND and applied to the reset terminal of the shift register 12 to change the registered content of the second to sixth digits in the register to 0, simultaneously setting the 1st digit to l for restoration of the shift register to its initial state.
At this time, the reset signal is applied to an input of AND gate, and AND gate,. Furthermore, the sixth digit output of the shift register 12 is applied to one terminal of the AND gate, via OR gate CR and OR, while the first digit output of the shift register 12 is applied to one terminal of AND gate AND, to reset the divider DIV, -abic second counter G05 and the 60-abic minute counter GOM.
When a watch having an incorrect timekeeping indication is correctly adjusted to the closest second, the second-setting is usually performed by listening to a time broadcast. The minute and second displays can be reset at 00 minute and 00 second by the reset switch S as shown in the embodiment in FIG. 1 only if it is turned on simultaneously with thesafety switch 8,.
When the output signal I of the shift register 12 lies in between the first and fourth digit after changing the date and week etc, the shift register 12 set at its initial state and all displays are operated if the reset switch S and safety switch S, are pushed simultaneously. But, no other changes take place at this time.
On the other hand, when the output 1 of the shift register 12 lies in fifth digit, the watch is stopped because the second signal is not applied to input of the second counter 608 as input. If the reset switch S is pushed simultaneously with the safety switch S at this time, the shift register 12 is set at its initial state and the second counter 608 is reset, as explained above.
Referring next to the safety switch S.,, the shift switch S set switch S, and reset switch 8,, do not work, if they are turned on independently of safety switch 3,. Each must be turned on together with the safety switch S.,. This is an extremely important feature to prevent erroneous operation.
The GATE circuits G, to G employed in this invention can be realized by such a circuit as shown in FIG. 2. Similarly, the GATE circuit G, can be accomplished by such a circuit as shown in FIG. 3.
Just as explained earlier, this invention makes it possible to adjust the date, day of the week, hour, minute and second displayed on an electronic wrist watch by an extremely small number of switches. As a consequence miniaturized, electronic watches of extremely small size can be manufactured. Moreover, a watch according to the present invention is very easy to use because the time setting adjustments are displayed to the user while they are being made thus preventing erroneous time settings. Whats more, circuitry according to the present invention completely eliminates inadvertent operation by providing the electronic wrist watch with the safety switch. Further, time can be set to a time broadcast or some other time standard by the reset switch to the exact second.
Furthermore, when only the date display is desired to be adjusted, renewed correction of the day of the week, hour, minute and second is not required subsequent to the date correction because the day of the week counter, hour counter, minute counter and second counter count the second pulses from the second pulse generator 11, respectively. This also applies to the correction of the week or hour settings.
It is to be understood that the present invention is not limited only to timepieces capable of displaying date, day of the week, hour, minute, and second, but can be applied to timepieces capable of displaying any one of any combination of them.
What we claim and desire to secure by Letters Patent is:
1. An electronic timepiece comprising, means generating time signal pulses constituting a time base, counting means receptive of said time signal pulses for counting said time signal pulses, means connected to the counting means developing digital outputs representative of time corresponding to at least one of date, day of the week, hour, minute and seconds time indications, display means connected to the means developing digital outputs to diaplay at least one of said time indications, and control means connected to said counting means and said display means for selectively displaying individually said time indications on said dising to the position of said control signal in said shift register.
3. In an electronic timepiece according to claim 2, including resetting means for resetting said shift register to an initial condition of memory content thereof.
4. In an electronic timepiece according to claim 2, including setting means coactive with said shift register for adjusting the time indications on said display means rapidly.
5. An electronic timepiece according to claim 4, including means comprising a safety switch operable in conjunction with said switching means, resetting means and said setting means individually to insure correct ad- 10 justment of said time indications and to prevent inadvertent changes thereto.
6. In an electronic timepiece according to claim 1, wherein said control means comprises means for displaying simultaneously all said time indications on said

Claims (6)

1. An electronic timepiece comprising, means generating time signal pulses constituting a time base, counting means receptive of said time signal pulses for counting said time signal pulses, means connected to the counting means developing digital outputs representative of time corresponding to at least one of date, day of the week, hour, minute and seconds time indications, display means connected to the means developing digital outputs to diaplay at least one of said time indications, and control means connected to said counting means and said display means for selectively displaying individually said time indications on said display means and including means for selectively setting each of said time indications to a desired value.
2. In an electronic timepiece according to claim 1, wherein said control means comprises, a shift register for storing a control signal therein, switching means connected to said shift register for shifting the position of said control signal within said shift register, and circuit means connecting said shift register to said counting means and said display means For applying said control signal thereto for selectively displaying said time indications and for setting said time indications according to the position of said control signal in said shift register.
3. In an electronic timepiece according to claim 2, including resetting means for resetting said shift register to an initial condition of memory content thereof.
4. In an electronic timepiece according to claim 2, including setting means coactive with said shift register for adjusting the time indications on said display means rapidly.
5. An electronic timepiece according to claim 4, including means comprising a safety switch operable in conjunction with said switching means, resetting means and said setting means individually to insure correct adjustment of said time indications and to prevent inadvertent changes thereto.
6. In an electronic timepiece according to claim 1, wherein said control means comprises means for displaying simultaneously all said time indications on said display means.
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US3953963A (en) * 1973-08-09 1976-05-04 Kabushiki Kaisha Suwa Seikosha Electronic digital display timepiece correction device
US3988886A (en) * 1973-08-14 1976-11-02 Casio Computer Co., Ltd. Time setting device for an electronic watch
US4028878A (en) * 1974-12-11 1977-06-14 Ebauches S.A. Control device for an electronic wrist watch
US4030283A (en) * 1974-03-25 1977-06-21 Societe Suisse Pour L'industrie Horlogere Management Services S.A. Electrically driven time piece with means for effecting a precise setting of time
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US4107915A (en) * 1972-12-28 1978-08-22 Citizen Watch Co., Ltd Electronic timepiece
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US4216649A (en) * 1976-07-06 1980-08-12 Citizen Watch Company Limited Function selection circuit for multi-function timepiece
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CN114815572A (en) * 2022-04-29 2022-07-29 杭州晶华微电子股份有限公司 Real-time clock unit circuit capable of automatically calculating week value

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JPS5289356A (en) * 1976-01-20 1977-07-26 Sanyo Electric Co Ltd Method of resetting indication correcting mode of electronic timepiece
JPS52102771A (en) * 1976-02-24 1977-08-29 Sanyo Electric Co Ltd Method of resetting indication correcting mode of electronic timepiece
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Cited By (21)

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USRE29720E (en) * 1972-04-17 1978-08-08 Kabushiki Kaisha Suwa Seikosha Time correcting apparatus for an electronic timepiece
US4067187A (en) * 1972-12-28 1978-01-10 Citizen Watch Co., Ltd. Electronic timepiece
US4107915A (en) * 1972-12-28 1978-08-22 Citizen Watch Co., Ltd Electronic timepiece
US3953963A (en) * 1973-08-09 1976-05-04 Kabushiki Kaisha Suwa Seikosha Electronic digital display timepiece correction device
US3988886A (en) * 1973-08-14 1976-11-02 Casio Computer Co., Ltd. Time setting device for an electronic watch
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US4216649A (en) * 1976-07-06 1980-08-12 Citizen Watch Company Limited Function selection circuit for multi-function timepiece
US4207731A (en) * 1976-11-18 1980-06-17 Kabushiki Kaisha Suwa Seikosha Electronic timepiece control circuit
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DE2658080A1 (en) * 1976-12-22 1978-07-06 Kloeckner Humboldt Deutz Ag Pulse regenerator for pulses of specified shape - has comparator controlling switches discharging capacitor
US4300221A (en) * 1978-07-06 1981-11-10 Kabushiki Kaisha Seikosha Electronic timepiece
US4308608A (en) * 1979-07-31 1981-12-29 Toyota Jidosha Kogyo Kabushiki Kaisha Digital electronic timepieces
CN114815572A (en) * 2022-04-29 2022-07-29 杭州晶华微电子股份有限公司 Real-time clock unit circuit capable of automatically calculating week value

Also Published As

Publication number Publication date
GB1366795A (en) 1974-09-11
JPS4863765A (en) 1973-09-04
DE2259957B2 (en) 1979-10-25
JPS5219788B2 (en) 1977-05-30
FR2162539A1 (en) 1973-07-20
CH1783272A4 (en) 1976-08-31
DE2259957C3 (en) 1980-09-25
CH588113B5 (en) 1977-05-31
FR2162539B1 (en) 1976-10-29
IT973778B (en) 1974-06-10
DE2259957A1 (en) 1973-06-14

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